• Line card - contains 8 channels of 3.125Gbps and traffic management ASIC.
  
• Matrix board - a 16x10Gbps switch matrix.

Components

·         Two 3.125Gbps SerDes

·         Two Xilinx FPGAS Virtex-II 6000

·         Xilinx CPLD XCR3384KL

·         Xilinx CPLD XC95144KL

·         Motorola 860 PowerPC CPU

·         Strata Flash for JTAG configuration of the FPGA

Interfaces

·         16 x 3.125Gbps Ethernet XAUI

·         8 of DDR XGMII channels

·         64 bit CSIX @ 250MHz

·         16 bit SPI-4 @ 622 MHz

Full Turn-Key Solution

·         System Design

·         Electrical Hardware design

·         Signal Integrity Simulations

·         HDL fabrication design

·         PCB Layout

·         Components Engineering

·         Board population

·         Prototype assembly and verification

Power requirements

Each card has ATX connectors for power.

The power consumptions are:

·         3.3V DC supply @ 10 Amps.

·         5A V DC supply @ 10 Amps.

The boards contains DC/DC converters to create the following voltage levels:

            1.2V @ 11 Amps.

            1.5V @ 5 Amps.

            2.5V @ 6 Amps.